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Location: Austin, TX or Sunnyvale, CA (100% Onsite)
Pay: $68/hour (C2C) | $75/hour (W2) | Starting at $70.00/hour
Job Type: Contract-to-Hire | Full-Time
Application Deadline: November 30, 2025

About the Role

Join a high-performing team focused on validating complex IP and SoC architectures. This long-term, onsite opportunity offers cutting-edge design exposure and collaboration with multi-disciplinary engineering teams.

Visa Sponsorship: H-1B transfers are welcome—applications are open to all visa statuses.

Key Responsibilities

• Develop & execute verification strategies for IP & SoC-level designs
• Build robust test benches for sub-system and chip-level functionality validation
• Write & run functional tests aligned with verification plans
• Debug issues & identify root causes, collaborating with design engineers
• Work closely with modeling, emulation & silicon validation teams
• Ensure verification completeness through metric fulfillment (functional/code coverage)

Qualifications & Required Skills

• Bachelor’s or Master’s degree in Electrical/Computer Engineering or Computer Science
• Expertise in Verilog, SystemVerilog & UVM methodology
• Proven experience in IP & SoC verification using SystemVerilog UVM/OVM techniques
• Proficiency in scripting & automation (Python, Perl, Shell)
• Deep understanding of EDA tools & verification infrastructure development

Preferred Qualifications

• Experience building UVM environments from scratch
• Exposure to data center technologies (AI/ML, networking, video applications)
• Familiarity with version control systems (Git, Mercurial, SVN)
• Background in ARM or RISC-V based SoCs or subsystems

Work Location & Compensation

• 100% Onsite (Austin, TX or Sunnyvale, CA)
• Full-Time & Contract-to-Hire opportunities
• Competitive hourly rates ($68-$75/hour)

Visa Sponsorship & Relocation Assistance

• H-1B Visa Transfers Available
• Support for visa sponsorship for eligible candidates

Apply Now & Advance Your Engineering Career! - Click Here